425 lines
17 KiB
Plaintext
425 lines
17 KiB
Plaintext
(kicad_pcb (version 20171130) (host pcbnew no-vcs-found-c6d0075~61~ubuntu16.04.1)
|
|
|
|
(general
|
|
(thickness 1.6)
|
|
(drawings 39)
|
|
(tracks 0)
|
|
(zones 0)
|
|
(modules 5)
|
|
(nets 32)
|
|
)
|
|
|
|
(page A3)
|
|
(title_block
|
|
(date "15 nov 2012")
|
|
)
|
|
|
|
(layers
|
|
(0 F.Cu signal)
|
|
(31 B.Cu signal)
|
|
(32 B.Adhes user)
|
|
(33 F.Adhes user)
|
|
(34 B.Paste user)
|
|
(35 F.Paste user)
|
|
(36 B.SilkS user)
|
|
(37 F.SilkS user)
|
|
(38 B.Mask user)
|
|
(39 F.Mask user)
|
|
(40 Dwgs.User user)
|
|
(41 Cmts.User user)
|
|
(42 Eco1.User user)
|
|
(43 Eco2.User user)
|
|
(44 Edge.Cuts user)
|
|
)
|
|
|
|
(setup
|
|
(last_trace_width 0.2)
|
|
(trace_clearance 0.2)
|
|
(zone_clearance 0.508)
|
|
(zone_45_only no)
|
|
(trace_min 0.1524)
|
|
(segment_width 0.1)
|
|
(edge_width 0.1)
|
|
(via_size 0.9)
|
|
(via_drill 0.6)
|
|
(via_min_size 0.8)
|
|
(via_min_drill 0.5)
|
|
(uvia_size 0.5)
|
|
(uvia_drill 0.1)
|
|
(uvias_allowed no)
|
|
(uvia_min_size 0.5)
|
|
(uvia_min_drill 0.1)
|
|
(pcb_text_width 0.3)
|
|
(pcb_text_size 1 1)
|
|
(mod_edge_width 0.15)
|
|
(mod_text_size 1 1)
|
|
(mod_text_width 0.15)
|
|
(pad_size 2.5 2.5)
|
|
(pad_drill 2.5)
|
|
(pad_to_mask_clearance 0)
|
|
(aux_axis_origin 200 150)
|
|
(grid_origin 200 150)
|
|
(visible_elements 7FFFFFFF)
|
|
(pcbplotparams
|
|
(layerselection 0x00030_80000001)
|
|
(usegerberextensions true)
|
|
(usegerberattributes false)
|
|
(usegerberadvancedattributes false)
|
|
(creategerberjobfile false)
|
|
(excludeedgelayer true)
|
|
(linewidth 0.150000)
|
|
(plotframeref false)
|
|
(viasonmask false)
|
|
(mode 1)
|
|
(useauxorigin false)
|
|
(hpglpennumber 1)
|
|
(hpglpenspeed 20)
|
|
(hpglpendiameter 15)
|
|
(psnegative false)
|
|
(psa4output false)
|
|
(plotreference true)
|
|
(plotvalue true)
|
|
(plotinvisibletext false)
|
|
(padsonsilk false)
|
|
(subtractmaskfromsilk false)
|
|
(outputformat 1)
|
|
(mirror false)
|
|
(drillshape 1)
|
|
(scaleselection 1)
|
|
(outputdirectory ""))
|
|
)
|
|
|
|
(net 0 "")
|
|
(net 1 +3V3)
|
|
(net 2 +5V)
|
|
(net 3 GND)
|
|
(net 4 /ID_SD)
|
|
(net 5 /ID_SC)
|
|
(net 6 /GPIO5)
|
|
(net 7 /GPIO6)
|
|
(net 8 /GPIO26)
|
|
(net 9 "/GPIO2(SDA1)")
|
|
(net 10 "/GPIO3(SCL1)")
|
|
(net 11 "/GPIO4(GCLK)")
|
|
(net 12 "/GPIO14(TXD0)")
|
|
(net 13 "/GPIO15(RXD0)")
|
|
(net 14 "/GPIO17(GEN0)")
|
|
(net 15 "/GPIO27(GEN2)")
|
|
(net 16 "/GPIO22(GEN3)")
|
|
(net 17 "/GPIO23(GEN4)")
|
|
(net 18 "/GPIO24(GEN5)")
|
|
(net 19 "/GPIO25(GEN6)")
|
|
(net 20 "/GPIO18(GEN1)(PWM0)")
|
|
(net 21 "/GPIO10(SPI0_MOSI)")
|
|
(net 22 "/GPIO9(SPI0_MISO)")
|
|
(net 23 "/GPIO11(SPI0_SCK)")
|
|
(net 24 "/GPIO8(SPI0_CE_N)")
|
|
(net 25 "/GPIO7(SPI1_CE_N)")
|
|
(net 26 "/GPIO12(PWM0)")
|
|
(net 27 "/GPIO13(PWM1)")
|
|
(net 28 "/GPIO19(SPI1_MISO)")
|
|
(net 29 /GPIO16)
|
|
(net 30 "/GPIO20(SPI1_MOSI)")
|
|
(net 31 "/GPIO21(SPI1_SCK)")
|
|
|
|
(net_class Default "This is the default net class."
|
|
(clearance 0.2)
|
|
(trace_width 0.2)
|
|
(via_dia 0.9)
|
|
(via_drill 0.6)
|
|
(uvia_dia 0.5)
|
|
(uvia_drill 0.1)
|
|
(add_net +3V3)
|
|
(add_net +5V)
|
|
(add_net "/GPIO10(SPI0_MOSI)")
|
|
(add_net "/GPIO11(SPI0_SCK)")
|
|
(add_net "/GPIO12(PWM0)")
|
|
(add_net "/GPIO13(PWM1)")
|
|
(add_net "/GPIO14(TXD0)")
|
|
(add_net "/GPIO15(RXD0)")
|
|
(add_net /GPIO16)
|
|
(add_net "/GPIO17(GEN0)")
|
|
(add_net "/GPIO18(GEN1)(PWM0)")
|
|
(add_net "/GPIO19(SPI1_MISO)")
|
|
(add_net "/GPIO2(SDA1)")
|
|
(add_net "/GPIO20(SPI1_MOSI)")
|
|
(add_net "/GPIO21(SPI1_SCK)")
|
|
(add_net "/GPIO22(GEN3)")
|
|
(add_net "/GPIO23(GEN4)")
|
|
(add_net "/GPIO24(GEN5)")
|
|
(add_net "/GPIO25(GEN6)")
|
|
(add_net /GPIO26)
|
|
(add_net "/GPIO27(GEN2)")
|
|
(add_net "/GPIO3(SCL1)")
|
|
(add_net "/GPIO4(GCLK)")
|
|
(add_net /GPIO5)
|
|
(add_net /GPIO6)
|
|
(add_net "/GPIO7(SPI1_CE_N)")
|
|
(add_net "/GPIO8(SPI0_CE_N)")
|
|
(add_net "/GPIO9(SPI0_MISO)")
|
|
(add_net /ID_SC)
|
|
(add_net /ID_SD)
|
|
(add_net GND)
|
|
)
|
|
|
|
(net_class Power ""
|
|
(clearance 0.2)
|
|
(trace_width 0.5)
|
|
(via_dia 1)
|
|
(via_drill 0.7)
|
|
(uvia_dia 0.5)
|
|
(uvia_drill 0.1)
|
|
)
|
|
|
|
(module Connector_PinSocket_2.54mm:PinSocket_2x20_P2.54mm_Vertical (layer B.Cu) (tedit 5A19A433) (tstamp 5A793E9F)
|
|
(at 208.37 98.77 270)
|
|
(descr "Through hole straight socket strip, 2x20, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated")
|
|
(tags "Through hole socket strip THT 2x20 2.54mm double row")
|
|
(path /59AD464A)
|
|
(fp_text reference P1 (at 2.208 1.512) (layer B.SilkS)
|
|
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
|
|
)
|
|
(fp_text value Conn_02x20_Odd_Even (at -1.27 -51.03 270) (layer B.Fab)
|
|
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
|
|
)
|
|
(fp_line (start -3.81 1.27) (end 0.27 1.27) (layer B.Fab) (width 0.1))
|
|
(fp_line (start 0.27 1.27) (end 1.27 0.27) (layer B.Fab) (width 0.1))
|
|
(fp_line (start 1.27 0.27) (end 1.27 -49.53) (layer B.Fab) (width 0.1))
|
|
(fp_line (start 1.27 -49.53) (end -3.81 -49.53) (layer B.Fab) (width 0.1))
|
|
(fp_line (start -3.81 -49.53) (end -3.81 1.27) (layer B.Fab) (width 0.1))
|
|
(fp_line (start -3.87 1.33) (end -1.27 1.33) (layer B.SilkS) (width 0.12))
|
|
(fp_line (start -3.87 1.33) (end -3.87 -49.59) (layer B.SilkS) (width 0.12))
|
|
(fp_line (start -3.87 -49.59) (end 1.33 -49.59) (layer B.SilkS) (width 0.12))
|
|
(fp_line (start 1.33 -1.27) (end 1.33 -49.59) (layer B.SilkS) (width 0.12))
|
|
(fp_line (start -1.27 -1.27) (end 1.33 -1.27) (layer B.SilkS) (width 0.12))
|
|
(fp_line (start -1.27 1.33) (end -1.27 -1.27) (layer B.SilkS) (width 0.12))
|
|
(fp_line (start 1.33 1.33) (end 1.33 0) (layer B.SilkS) (width 0.12))
|
|
(fp_line (start 0 1.33) (end 1.33 1.33) (layer B.SilkS) (width 0.12))
|
|
(fp_line (start -4.34 1.8) (end 1.76 1.8) (layer B.CrtYd) (width 0.05))
|
|
(fp_line (start 1.76 1.8) (end 1.76 -50) (layer B.CrtYd) (width 0.05))
|
|
(fp_line (start 1.76 -50) (end -4.34 -50) (layer B.CrtYd) (width 0.05))
|
|
(fp_line (start -4.34 -50) (end -4.34 1.8) (layer B.CrtYd) (width 0.05))
|
|
(fp_text user %R (at -1.27 -24.13 180) (layer B.Fab)
|
|
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
|
|
)
|
|
(pad 1 thru_hole rect (at 0 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 1 +3V3))
|
|
(pad 2 thru_hole oval (at -2.54 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 2 +5V))
|
|
(pad 3 thru_hole oval (at 0 -2.54 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 9 "/GPIO2(SDA1)"))
|
|
(pad 4 thru_hole oval (at -2.54 -2.54 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 2 +5V))
|
|
(pad 5 thru_hole oval (at 0 -5.08 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 10 "/GPIO3(SCL1)"))
|
|
(pad 6 thru_hole oval (at -2.54 -5.08 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 3 GND))
|
|
(pad 7 thru_hole oval (at 0 -7.62 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 11 "/GPIO4(GCLK)"))
|
|
(pad 8 thru_hole oval (at -2.54 -7.62 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 12 "/GPIO14(TXD0)"))
|
|
(pad 9 thru_hole oval (at 0 -10.16 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 3 GND))
|
|
(pad 10 thru_hole oval (at -2.54 -10.16 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 13 "/GPIO15(RXD0)"))
|
|
(pad 11 thru_hole oval (at 0 -12.7 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 14 "/GPIO17(GEN0)"))
|
|
(pad 12 thru_hole oval (at -2.54 -12.7 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 20 "/GPIO18(GEN1)(PWM0)"))
|
|
(pad 13 thru_hole oval (at 0 -15.24 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 15 "/GPIO27(GEN2)"))
|
|
(pad 14 thru_hole oval (at -2.54 -15.24 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 3 GND))
|
|
(pad 15 thru_hole oval (at 0 -17.78 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 16 "/GPIO22(GEN3)"))
|
|
(pad 16 thru_hole oval (at -2.54 -17.78 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 17 "/GPIO23(GEN4)"))
|
|
(pad 17 thru_hole oval (at 0 -20.32 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 1 +3V3))
|
|
(pad 18 thru_hole oval (at -2.54 -20.32 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 18 "/GPIO24(GEN5)"))
|
|
(pad 19 thru_hole oval (at 0 -22.86 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 21 "/GPIO10(SPI0_MOSI)"))
|
|
(pad 20 thru_hole oval (at -2.54 -22.86 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 3 GND))
|
|
(pad 21 thru_hole oval (at 0 -25.4 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 22 "/GPIO9(SPI0_MISO)"))
|
|
(pad 22 thru_hole oval (at -2.54 -25.4 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 19 "/GPIO25(GEN6)"))
|
|
(pad 23 thru_hole oval (at 0 -27.94 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 23 "/GPIO11(SPI0_SCK)"))
|
|
(pad 24 thru_hole oval (at -2.54 -27.94 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 24 "/GPIO8(SPI0_CE_N)"))
|
|
(pad 25 thru_hole oval (at 0 -30.48 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 3 GND))
|
|
(pad 26 thru_hole oval (at -2.54 -30.48 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 25 "/GPIO7(SPI1_CE_N)"))
|
|
(pad 27 thru_hole oval (at 0 -33.02 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 4 /ID_SD))
|
|
(pad 28 thru_hole oval (at -2.54 -33.02 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 5 /ID_SC))
|
|
(pad 29 thru_hole oval (at 0 -35.56 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 6 /GPIO5))
|
|
(pad 30 thru_hole oval (at -2.54 -35.56 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 3 GND))
|
|
(pad 31 thru_hole oval (at 0 -38.1 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 7 /GPIO6))
|
|
(pad 32 thru_hole oval (at -2.54 -38.1 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 26 "/GPIO12(PWM0)"))
|
|
(pad 33 thru_hole oval (at 0 -40.64 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 27 "/GPIO13(PWM1)"))
|
|
(pad 34 thru_hole oval (at -2.54 -40.64 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 3 GND))
|
|
(pad 35 thru_hole oval (at 0 -43.18 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 28 "/GPIO19(SPI1_MISO)"))
|
|
(pad 36 thru_hole oval (at -2.54 -43.18 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 29 /GPIO16))
|
|
(pad 37 thru_hole oval (at 0 -45.72 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 8 /GPIO26))
|
|
(pad 38 thru_hole oval (at -2.54 -45.72 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 30 "/GPIO20(SPI1_MOSI)"))
|
|
(pad 39 thru_hole oval (at 0 -48.26 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 3 GND))
|
|
(pad 40 thru_hole oval (at -2.54 -48.26 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 31 "/GPIO21(SPI1_SCK)"))
|
|
(model ${KISYS3DMOD}/Connector_PinSocket_2.54mm.3dshapes/PinSocket_2x20_P2.54mm_Vertical.wrl
|
|
(at (xyz 0 0 0))
|
|
(scale (xyz 1 1 1))
|
|
(rotate (xyz 0 0 0))
|
|
)
|
|
)
|
|
|
|
(module MountingHole:MountingHole_2.7mm_M2.5 (layer F.Cu) (tedit 56D1B4CB) (tstamp 5A793E98)
|
|
(at 261.5 146.5)
|
|
(descr "Mounting Hole 2.7mm, no annular, M2.5")
|
|
(tags "mounting hole 2.7mm no annular m2.5")
|
|
(path /5834FC4F)
|
|
(attr virtual)
|
|
(fp_text reference MK4 (at 0 -3.7) (layer F.SilkS)
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(fp_text value M2.5 (at 0 3.7) (layer F.Fab)
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(fp_circle (center 0 0) (end 2.95 0) (layer F.CrtYd) (width 0.05))
|
|
(fp_circle (center 0 0) (end 2.7 0) (layer Cmts.User) (width 0.15))
|
|
(fp_text user %R (at 0.3 0) (layer F.Fab)
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(pad 1 np_thru_hole circle (at 0 0) (size 2.7 2.7) (drill 2.7) (layers *.Cu *.Mask))
|
|
)
|
|
|
|
(module MountingHole:MountingHole_2.7mm_M2.5 (layer F.Cu) (tedit 56D1B4CB) (tstamp 5A793E91)
|
|
(at 203.5 146.5)
|
|
(descr "Mounting Hole 2.7mm, no annular, M2.5")
|
|
(tags "mounting hole 2.7mm no annular m2.5")
|
|
(path /5834FBEF)
|
|
(attr virtual)
|
|
(fp_text reference MK3 (at 0 -3.7) (layer F.SilkS)
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(fp_text value M2.5 (at 0 3.7) (layer F.Fab)
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(fp_text user %R (at 0.3 0) (layer F.Fab)
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(fp_circle (center 0 0) (end 2.7 0) (layer Cmts.User) (width 0.15))
|
|
(fp_circle (center 0 0) (end 2.95 0) (layer F.CrtYd) (width 0.05))
|
|
(pad 1 np_thru_hole circle (at 0 0) (size 2.7 2.7) (drill 2.7) (layers *.Cu *.Mask))
|
|
)
|
|
|
|
(module MountingHole:MountingHole_2.7mm_M2.5 (layer F.Cu) (tedit 56D1B4CB) (tstamp 5A793E8A)
|
|
(at 261.5 97.5 180)
|
|
(descr "Mounting Hole 2.7mm, no annular, M2.5")
|
|
(tags "mounting hole 2.7mm no annular m2.5")
|
|
(path /5834FC19)
|
|
(attr virtual)
|
|
(fp_text reference MK2 (at 0 -3.7 180) (layer F.SilkS)
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(fp_text value M2.5 (at 0 3.7 180) (layer F.Fab)
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(fp_circle (center 0 0) (end 2.95 0) (layer F.CrtYd) (width 0.05))
|
|
(fp_circle (center 0 0) (end 2.7 0) (layer Cmts.User) (width 0.15))
|
|
(fp_text user %R (at 0.3 0 180) (layer F.Fab)
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(pad 1 np_thru_hole circle (at 0 0 180) (size 2.7 2.7) (drill 2.7) (layers *.Cu *.Mask))
|
|
)
|
|
|
|
(module MountingHole:MountingHole_2.7mm_M2.5 (layer F.Cu) (tedit 56D1B4CB) (tstamp 5A793E83)
|
|
(at 203.5 97.5 180)
|
|
(descr "Mounting Hole 2.7mm, no annular, M2.5")
|
|
(tags "mounting hole 2.7mm no annular m2.5")
|
|
(path /5834FB2E)
|
|
(attr virtual)
|
|
(fp_text reference MK1 (at 0 -3.7 180) (layer F.SilkS)
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(fp_text value M2.5 (at 0 3.7 180) (layer F.Fab)
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(fp_text user %R (at 0.3 0 180) (layer F.Fab)
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(fp_circle (center 0 0) (end 2.7 0) (layer Cmts.User) (width 0.15))
|
|
(fp_circle (center 0 0) (end 2.95 0) (layer F.CrtYd) (width 0.05))
|
|
(pad 1 np_thru_hole circle (at 0 0 180) (size 2.7 2.7) (drill 2.7) (layers *.Cu *.Mask))
|
|
)
|
|
|
|
(gr_line (start 244 146) (end 244 131) (layer Edge.Cuts) (width 0.1))
|
|
(gr_line (start 246 131) (end 246 146) (layer Edge.Cuts) (width 0.1))
|
|
(gr_arc (start 245 131) (end 244 131) (angle 180) (layer Edge.Cuts) (width 0.1))
|
|
(gr_arc (start 245 146) (end 246 146) (angle 180) (layer Edge.Cuts) (width 0.1))
|
|
(gr_arc (start 200.5 131) (end 200 131) (angle 89.9) (layer Edge.Cuts) (width 0.1))
|
|
(gr_arc (start 204.5 130) (end 205 130) (angle 90) (layer Edge.Cuts) (width 0.1))
|
|
(gr_arc (start 200.5 113) (end 200.5 113.5) (angle 90) (layer Edge.Cuts) (width 0.1))
|
|
(gr_arc (start 204.5 114) (end 204.5 113.5) (angle 90) (layer Edge.Cuts) (width 0.1))
|
|
(gr_line (start 200 113) (end 200 131) (layer Dwgs.User) (width 0.1))
|
|
(gr_line (start 200 97) (end 200 113) (layer Edge.Cuts) (width 0.1))
|
|
(gr_text DISPLAY (at 202.5 122 90) (layer Dwgs.User) (tstamp 580CBBFF)
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(gr_text CAMERA (at 245 139 90) (layer Dwgs.User)
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(gr_text RJ45 (at 276.2 139.84) (layer Dwgs.User) (tstamp 580CBBEB)
|
|
(effects (font (size 2 2) (thickness 0.15)))
|
|
)
|
|
(gr_text USB (at 277.724 121.552) (layer Dwgs.User) (tstamp 580CBBE9)
|
|
(effects (font (size 2 2) (thickness 0.15)))
|
|
)
|
|
(gr_text USB (at 278.232 102.248) (layer Dwgs.User)
|
|
(effects (font (size 2 2) (thickness 0.15)))
|
|
)
|
|
(gr_arc (start 262 97) (end 262 94) (angle 90) (layer Edge.Cuts) (width 0.1))
|
|
(gr_arc (start 262 147) (end 265 147) (angle 90) (layer Edge.Cuts) (width 0.1))
|
|
(gr_arc (start 203 147) (end 203 150) (angle 90) (layer Edge.Cuts) (width 0.1))
|
|
(gr_arc (start 203 97) (end 200 97) (angle 90) (layer Edge.Cuts) (width 0.1))
|
|
(gr_line (start 269.9 114.45) (end 287 114.45) (layer Dwgs.User) (width 0.1))
|
|
(gr_line (start 262 94) (end 203 94) (layer Edge.Cuts) (width 0.1))
|
|
(gr_line (start 269.9 127.55) (end 269.9 114.45) (layer Dwgs.User) (width 0.1))
|
|
(gr_line (start 287 127.55) (end 269.9 127.55) (layer Dwgs.User) (width 0.1))
|
|
(gr_line (start 287 114.45) (end 287 127.55) (layer Dwgs.User) (width 0.1))
|
|
(gr_line (start 204.5 130.5) (end 200.5 130.5) (layer Edge.Cuts) (width 0.1))
|
|
(gr_line (start 205 114) (end 205 130) (layer Edge.Cuts) (width 0.1))
|
|
(gr_line (start 200.5 113.5) (end 204.5 113.5) (layer Edge.Cuts) (width 0.1))
|
|
(gr_line (start 266 147.675) (end 266 131.825) (layer Dwgs.User) (width 0.1))
|
|
(gr_line (start 287 147.675) (end 266 147.675) (layer Dwgs.User) (width 0.1))
|
|
(gr_line (start 287 131.825) (end 287 147.675) (layer Dwgs.User) (width 0.1))
|
|
(gr_line (start 266 131.825) (end 287 131.825) (layer Dwgs.User) (width 0.1))
|
|
(gr_line (start 265 147) (end 265 97) (layer Edge.Cuts) (width 0.1))
|
|
(gr_line (start 203 150) (end 262 150) (layer Edge.Cuts) (width 0.1))
|
|
(gr_line (start 200 131) (end 200 147) (layer Edge.Cuts) (width 0.1))
|
|
(gr_line (start 269.9 109.455925) (end 269.9 96.355925) (layer Dwgs.User) (width 0.1))
|
|
(gr_line (start 287 109.455925) (end 269.9 109.455925) (layer Dwgs.User) (width 0.1))
|
|
(gr_line (start 287 96.355925) (end 287 109.455925) (layer Dwgs.User) (width 0.1))
|
|
(gr_line (start 269.9 96.355925) (end 287 96.355925) (layer Dwgs.User) (width 0.1))
|
|
(gr_text "RASPBERRY-PI 40-PIN ADDON BOARD\nVIEW FROM TOP\nNOTE: P1 SHOULD BE FITTED ON THE REVERSE OF THE BOARD\n\nADD EDGE CUTS FROM CAMERA AND DISPLAY PORTS AS REQUIRED" (at 200 160.16) (layer Dwgs.User)
|
|
(effects (font (size 2 1.7) (thickness 0.12)) (justify left))
|
|
)
|
|
|
|
)
|